`ifndef _ral_reg_REG_PRJ_sys_cfg_cfg_info0_rtl_
`define _ral_reg_REG_PRJ_sys_cfg_cfg_info0_rtl_

`include "vmm_ral_rw_field_rtl.sv"
`include "vmm_ral_notifier_rtl.sv"


module ral_reg_REG_PRJ_sys_cfg_cfg_info0_rtl(input  clk,
                             input  rstn,
                             input  [31:0] hst_wdat,
                             output [31:0] hst_rdat,
                             input  [3:0] hst_sel,
                             input  hst_wen,
                             output [2:0] layer_field0_out,
                             output layer_field0_rd, layer_field0_wr,
                             input  layer_field0_wen,
                             input  [2:0] layer_field0_in,
                             output [2:0] layer_field1_out,
                             output layer_field1_rd, layer_field1_wr,
                             input  layer_field1_wen,
                             input  [2:0] layer_field1_in,
                             output [2:0] layer_field2_out,
                             output layer_field2_rd, layer_field2_wr,
                             input  layer_field2_wen,
                             input  [2:0] layer_field2_in,
                             output [2:0] layer_field3_out,
                             output layer_field3_rd, layer_field3_wr,
                             input  layer_field3_wen,
                             input  [2:0] layer_field3_in,
                             output [2:0] layer_field4_out,
                             output layer_field4_rd, layer_field4_wr,
                             input  layer_field4_wen,
                             input  [2:0] layer_field4_in,
                             output [2:0] layer_field5_out,
                             output layer_field5_rd, layer_field5_wr,
                             input  layer_field5_wen,
                             input  [2:0] layer_field5_in);

vmm_ral_rw_field_rtl #(3, 'h1)
   layer_field0(clk, rstn, layer_field0_out,
   hst_wdat[2:0], hst_sel[0], hst_wen,
   layer_field0_in, layer_field0_wen);

vmm_ral_rw_field_rtl #(3, 'h2)
   layer_field1(clk, rstn, layer_field1_out,
   hst_wdat[5:3], hst_sel[0], hst_wen,
   layer_field1_in, layer_field1_wen);

vmm_ral_rw_field_rtl #(2, ('h3>>0))
   layer_field2_1_0(clk, rstn, layer_field2_out[1:0],
   hst_wdat[7:6], hst_sel[0], hst_wen,
   layer_field2_in[1:0], layer_field2_wen);

vmm_ral_rw_field_rtl #(1, ('h3>>2))
   layer_field2_2_2(clk, rstn, layer_field2_out[2:2],
   hst_wdat[8:8], hst_sel[1], hst_wen,
   layer_field2_in[2:2], layer_field2_wen);

vmm_ral_rw_field_rtl #(3, 'h4)
   layer_field3(clk, rstn, layer_field3_out,
   hst_wdat[11:9], hst_sel[0], hst_wen,
   layer_field3_in, layer_field3_wen);

vmm_ral_rw_field_rtl #(3, 'h5)
   layer_field4(clk, rstn, layer_field4_out,
   hst_wdat[14:12], hst_sel[0], hst_wen,
   layer_field4_in, layer_field4_wen);

vmm_ral_rw_field_rtl #(1, ('h6>>0))
   layer_field5_0_0(clk, rstn, layer_field5_out[0:0],
   hst_wdat[15:15], hst_sel[1], hst_wen,
   layer_field5_in[0:0], layer_field5_wen);

vmm_ral_rw_field_rtl #(2, ('h6>>1))
   layer_field5_2_1(clk, rstn, layer_field5_out[2:1],
   hst_wdat[17:16], hst_sel[2], hst_wen,
   layer_field5_in[2:1], layer_field5_wen);


vmm_ral_notifier_rtl _n_layer_field0(clk, rstn, hst_sel[0], hst_wen, layer_field0_rd, layer_field0_wr);
vmm_ral_notifier_rtl _n_layer_field1(clk, rstn, hst_sel[0], hst_wen, layer_field1_rd, layer_field1_wr);
vmm_ral_notifier_rtl _n_layer_field2(clk, rstn, |hst_sel[1:0], hst_wen, layer_field2_rd, layer_field2_wr);
vmm_ral_notifier_rtl _n_layer_field3(clk, rstn, hst_sel[0], hst_wen, layer_field3_rd, layer_field3_wr);
vmm_ral_notifier_rtl _n_layer_field4(clk, rstn, hst_sel[0], hst_wen, layer_field4_rd, layer_field4_wr);
vmm_ral_notifier_rtl _n_layer_field5(clk, rstn, |hst_sel[2:1], hst_wen, layer_field5_rd, layer_field5_wr);


assign hst_rdat[31:0] = { layer_field5_out, layer_field4_out, layer_field3_out, layer_field2_out, layer_field1_out, layer_field0_out };


endmodule

`endif
